HIGH-PERFORMANCE RESIDUE GENERATOR ARCHITECTURES FOR MOD 2ⁿ + 1 WITH DIMINISHED-1 ENCODING

Moduli of the form 2n+12^n + 12n+1 are frequently used in residue number systems (RNS) because of their low hardware cost and arithmetic operation efficiency. For calculations modulo 2n+12^n + 12n+1, the diminished-1 (D1) representation is especially useful, which encourages input converters to produce residues directly in this format. In this work, we present a flexible design for a residue generator that generates outputs in D1 form modulo 2n+12^n + 12n+1. The generator's last stage, a 4-operand adder modulo 2n+12^n + 12n+1, is constant for all ppp values, while the starting stage can be set up for any p≥4np \ge 4np≥4n. Additionally, the design can be extended into a p-input bi-residue generator by adding conjugate moduli 2n±12^n \pm 12n±1 to the RNS set. This update provides a flexible and hardware-efficient solution for RNS input conversion by enabling direct computation of residues modulo 2n+12^n + 12n+1 in D1 form and allowing hardware sharing of p−4np - 4np−4n fulladders.