Independent Hardware / Simulation Report of 0DSTL GenX vs Default Qubits Jeremy Green

We thank Jeremy Green for running independent simulation and hardware tests using the Q-SLICE threat harness on IBM Quantum Cloud backends. These results provide the (World first direct hardware-to-hardware) comparison between the 0DSTL GenX-interaction-driven architecture and default entanglement-based qubit circuits, and form the basis of this report. Important! The hardware is NOT optimized for GenX. Pulse shapes, calibration, and detangling gates are designed for default/Bell architectures. Nevertheless, GenX delivers: equivalent results with greater stability This means: The improved performance comes from the architecture, not from hardware optimization. GenX hardware optimization has additional potential. Grover clarification GenX uses the standard Grover circuit here, but in a minimal one-layer configuration.At this scale, this is effectively equivalent to genx_lanes = 1. The deep-entanglement MCX machinery is therefore still used, but on small circuits this does not introduce a meaningful difference. The architectural effect only becomes visible as scale and hardware mismatch increase. New report:https://zenodo.org/records/18313370 Join the 0DSTL Architecture Community: A physically based, deterministic architecture built around 0DSTL.Researchers can submit prototypes, simulation results, implementation studies, and related computational models. 🔗 0DSTL GenX: https://doi.org/10.5281/zenodo.17795203 For submissions or review requests, please contact:📎 LinkedIn: https://www.linkedin.com/in/sebastiano-torrisi-06073a2a1/📧 Email: info@0dstl.de OR 🔗 Community: https://zenodo.org/communities/0dstl-architecture Usage & LicensingAll is free use for non-commercial purposes, including research, benchmarking, and educational applications.The underlying 0DSTL/GenX architecture and design principles are considered a separate work and may be subject to independent licensing or future protection.Use of this script etc does not grant rights to the 0DSTL/GenX architecture itself, or other estimated 0DSTL architecture parts.