ARIANNA AI Trigger System: FPGA Firmware and CNN Implementation

The AI Trigger System is a real-time, AI-based event selector designed to ingest high-speed raw data from front-end analog-to-digital converter(ADC) digitizers, perform low-latency inference using parallel CNN Accelerator Cores, and trigger the readout of high-fidelity waveform data. The architecture employs a Split-Path Strategy to decouple data storage from analysis. Incoming data is bifurcated into a Storage Path (High-Fidelity Ground Truth) and an Inference Path (Downsampled/Selected Channels). A central PicoRV32 soft-core orchestrates a pool of parallel CNN Accelerators and a composite Hi-Lo trigger via a dedicated DMA engine. Use a composite hi-lo trigger with a simplified CNN trigger as the trigger scheme for maintenance and emergency situations. While allowing simple task logic to be controlled via the host computer, system logic can also be rewritten by writing binary files.