CATECHON-DSP: Hard-Realtime FPGA Core for Plasma Instability Suppression (IP v4.0)

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Authors: Maksym Alekseevich Kovalevych
Cited by: 0

Abstract

This dataset contains the technical datasheet and hardware specification for the Catechon DSP Preprocessor (v4.0 Diamond). The core is a specialized FPGA-based signal conditioning unit designed for Tokamak magnetic diagnostics (Mirnov coils). It implements a reflexive control architecture capable of detecting Vertical Displacement Events (VDE) and ELMs with a deterministic latency of

Fields of Study & Subjects

Magnetic confinement fusion research Embedded Systems and FPGA Design Embedded Systems and FPGA Applications

Publication details

Journal / source
Zenodo (CERN European Organization for Nuclear Research)
Publication date
9 February 2026