Banked Optical Delay Memory with Latched Taps

This paper analyses random-access service latency in recirculating delay-line memory (for example, fibre-loop storage) under a fixed in-flight storage budget. In this model, a slot can be read only when it reaches a tap; a latch at the tap captures the observed slot at the service time. The paper compares a single loop of depth S with a banked architecture that partitions the same total storage across k independent loops of depths m1 to mk, where the sum of mi equals S. The single-loop worst-case service latency is S minus 1 time steps. For the banked system, the worst-case service latency is max(mi minus 1). Under a balanced partition, this yields an approximately k-fold reduction in worst-case latency at fixed physical storage. A deterministic simulation procedure is specified, including an explicit balanced-bank mapping and a fixed pseudo-random generator, enabling exact reproduction of the reported statistics without external dependencies. A worked example with S = 1,000,000 and k = 4096 demonstrates a reduction in worst-case latency from 999,999 to 244 time steps (approximately 4,000x) while preserving the total in-flight slot budget.