Bistable Interval Maps Realized via Fourier-Synthesized Nonlinearity: A Wave-Based Logic Gate Toward Transistor-Free Computation

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Authors: Austin B. Park
Cited by: 0

Abstract

This work presents a constructive demonstration that wave interference combined with nonlinear restoration can implement functionally complete Boolean logic in an iterated-map gate model, without transistor switching elements. The central problem addressed is the degradation of cascaded linear wave logic toward an undecided intermediate state. I show that stable digital computation in such systems requires a bistable interval map — a smooth strictly increasing function on [0,1] with two attracting fixed points separated by a repelling fixed point — which provides active self-correction under iteration. The logistic sigmoid is established as a convenient analytic representative of this class. A 5-component Fourier-synthesized saturating transfer is then constructed that approximates the sigmoid’s shape with low error and no Gibbs overshoot, while highlighting strict monotonicity as a necessary constraint for physical realization. Using wave interference combined with nonlinear restoration, a NAND gate is implemented in the iterated-map model. Functional completeness is demonstrated through construction of NOT, AND, OR, XOR, and a half-adder, establishing computational universality of the gate abstraction. Extended numerical experiments show stability under deep cascades, noise injection, fan-out, parameter drift, and bistable memory operation. A qualitative nonlinear Schrödinger equation (NLSE) simulation provides physical consistency with Kerr-type optical media. This repository contains the full manuscript, simulation code, and validation experiments supporting the bistable interval map framework and Fourier-synthesized nonlinear gate model for wave-based computation.

Fields of Study & Subjects

Mathematical Dynamics and Fractals Cellular Automata and Applications Nonlinear Dynamics and Pattern Formation

Publication details

Journal / source
Zenodo (CERN European Organization for Nuclear Research)
Publication date
18 February 2026
Language
EN
Document type
Preprint