Scale-Invariant Neuromorphic Semiconductor Architecture and Method for Deterministic Node Routing

Zenodo (CERN European Organization for Nuclear Research) 2026 Open access

Read full text
Authors: John Drayton
DOI: 10.5281/zenodo.18806842
Cited by: 0

Abstract

"This paper presents a scale-invariant neuromorphic semiconductor architecture utilizing deterministic node routing. It details a method for overcoming standard RC delay and thermal dissipation bottlenecks in VLSI routing, providing a foundational framework for next-generation hardware."

Fields of Study & Subjects

Advanced Memory and Neural Computing VLSI and FPGA Design Techniques Interconnection Networks and Systems

Publication details

Journal / source
Zenodo (CERN European Organization for Nuclear Research)
Publication date
27 February 2026
Language
EN