IMPLEMENTATION OF VOLTAGE GAIN EXPERIMENT ON A TRANSISTOR AMPLIFIER TRAINER

This study investigates the implementation and experimental assessment of voltage gain in a common emitter transistor amplifier trainer using a BC177 PNP bipolar junction transistor. The trainer was designed with a regulated power supply, biasing network, coupling and bypass capacitors, and measurement instruments. Input signal voltages varied from 1 V to 10 V at a constant 1 kHz. Voltage gain (Vo/Vi) reached a maximum of 9.05 at 1 V input, decreasing progressively to near unity at 10 V due to saturation. Findings confirm an inverse input-gain relationship in common emitter amplifiers and validate the trainer as an effective educational tool for transistor amplification and nonlinear behaviour. Undergraduate final-year project, Department of Electrical/Electronics Engineering, University of Uyo.