Physical-Layer Containment via Isochronous Governors: An Information-Theoretic Side-Channel Countermeasure
Abstract
Non-deterministic computation—whether from neural networks, speculative execution, or legacy system architectures—inevitably leaks information via timing side-channels, bypassing cryptographic isolation and air gaps. We propose a hardware-enforced containment architecture, Project BLACKBODY, which treats the compute node as a high-entropy thermodynamic source. By interposing a unidirectional, isochronous Field-Programmable Gate Array (FPGA) governor between the secure zone and the operator, we physically clamp the channel capacity (C) to ≤ 1200 bits per second. We demonstrate through information theory that limiting the rate of information egress below the human cognitive processing threshold mathematically bounds the system's "Agency" (α), rendering high-velocity exfiltration, covert timing attacks, and real-time manipulation thermodynamically impossible.
Fields of Study & Subjects
Security and Verification in Computing
Cryptographic Implementations and Security
Physical Unclonable Functions (PUFs) and Hardware Security
Publication details
- Journal / source
- Zenodo (CERN European Organization for Nuclear Research)
- Publication date
- 11 March 2026
- Language
- EN
- Document type
- Preprint