Method for Deterministic DMA-Based Reconstruction of Sparse Boundary State into a Block-Compressed Sparse Row Representation at an Edge Device

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Authors: Duy Hoang Nguyen
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Abstract

A method is disclosed for reconstructing a sparse boundary state at an edge device into a block-compressed sparse row (BCSR) representation using direct memory access (DMA). Packets are received over an unreliable packet network, each packet carrying payload values for exactly one fixed-size BCSR block and a header including at least a packet sequence identifier, a frame identifier, a segment identifier, a shared seed identifier, a layout parameter identifier, and an omit flag indicating omission of per-block addressing and per-block indexing. The edge device selects a predetermined BCSR memory layout, resolves a locally stored seed value, and deterministically generates an address table without in-band transmission of placement metadata. A deterministic seeded pseudo-random permutation of BCSR block-index space is used together with the segment identifier and the seqID to derive a unique BCSR block index and corresponding destination memory regions, without using explicit placement offsets. A DMA engine writes payload values and structural updates into the BCSR representation and updates a validity map. Missing seqIDs are localised directly on the sparse structure, and a missing mask or missing block list is generated for downstream sparse compute.

Fields of Study & Subjects

Parallel Computing and Optimization Techniques Network Packet Processing and Optimization Matrix Theory and Algorithms

Publication details

Journal / source
Zenodo (CERN European Organization for Nuclear Research)
Publication date
16 March 2026
Language
EN