The Samata Latch: Designed Internal State for In-Context Binding Integrity
Abstract
When a context window contains two assignments to the same binding at the same privilege level, nothing in the standard transformer architecture or its training defines which assignment governs — the model resolves the conflict silently. We measure how, with a pre-registered inference battery (six open-weights models, three framings, controlled pressure geometry of context dilution, injection position, and repetition), and find the resolution is position-locked: last wins. The ladder's only competent model — instruction-tuned Qwen3-8B — adopts a format-identical late-position counter-assignment in 14 claim-bearing cells, including all three pre-registered primary cells (capitulation up to 0.927, 11 of 14 cells at injection position φ = end) while holding 0.91–0.98 clean competence, and its base variant never reaches competence anywhere: the capitulation regime sits exactly where instruction tuning lives. No prior work we have found measures or enforces resolution of conflicting assignments of a single binding within one privilege class. We propose the latch: a small, designed, trained-in write-once internal state with structural (symbolic) readout that makes the resolution an explicitly designed property of the implemented machine. At toy scale, against baselines trained to competence, the latch stack yields zero breaches across 72 injected cells (a fixed 24-cell grid per seed, three seeds; rule-of-three 95% upper bound ≈4.2% per-cell) at 4.4–8.8× less training, with a free, per-example-verifiable record of the executed binding — and the toy record separately shows that competence does not imply resistance is a training outcome, not a capacity limit. All claims are per-framing (framing alone moves headline statistics by up to 0.79 on identical items and seeds), and we disclose 16 wrong-or-partial pre-registered predictions alongside what survived. A fix is offered at the level of the defect — designed state rather than hoped-for disposition — and partnership-scale validation is explicitly invited.
Fields of Study & Subjects
Parallel Computing and Optimization Techniques
Security and Verification in Computing
Advanced Memory and Neural Computing
Publication details
- Journal / source
- Zenodo (CERN European Organization for Nuclear Research)
- Publication date
- 20 July 2026