Maya-Sutra P3: Remembering on Silicon Selective On-Chip Retention on BrainScaleS-2

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Authors: Venkatesh Swaminathan
Cited by: 62
References: 45

Abstract

Version 2 (2026-08-05). Revised to the NLL Universal Paper Format v6. The original text is retained in full; nothing has been deleted. Corrections appear as marked blocks placed at the section that carries the claim, and each one states what the paper said, what the data show, the corrected claim, why it happened, and what still stands. This version withdraws one claim and restores another that the paper had withheld.The one-to-one mapping between the protection mask and the neurons is fixed by the hardware — the kernel skips even synapse-array columns, and columns are neurons — so no calibration could have produced any other assignment, and it is withdrawn as a result; separately, the cells described as "always-on" were shown by Maya-Sutra P4 to read exactly 0.00 under a true silence null while carrying the highest gain, so they are hypersensitive rather than spontaneously active.The honest negative in Section 4.6 was too severe on its own evidence: under decay_all, neurons 2 and 4 fall from 7.7 to 5.0 and from 5.0 to about 2.3 pops, while under the selective arm they hold at 7.0-8.0 and at exactly 5.0, on every calibration — so the population claim is three clean cells, not one. The retention effect, the protect_all null control, the instrument validation and the correctly rejected Day-1 candidate all stand. Everything below this line is the original description from version 1. It is retained unchanged for the record. Where it conflicts with the corrections above, the corrections stand. Two framings it repeats have since been withdrawn in full — the Bhaya Quiescence Law and the Buddhi S-Curve. Both are addressed in Maya-Meta P1, now superseded, and in the self-audit of Maya-Meta P2. Maya-Sutra P3: Remembering on Silicon asks whether a neuromorphic chip can be told what to keep. In Maya-Sutra P2 (DOI 10.5281/zenodo.21451194) a decay kernel on the BrainScaleS-2 Plasticity Processing Unit weakened every synapse until the neuron let go. This paper adds a single line to that kernel — a per-synapse skip condition — so the chip decays some synapses while protecting others, within the same rule and the same hardware run. The construct is Smṛti (स्मृति; memory, deliberate retention), the complement of the Vairāgya let-go of Papers 1 and 2. One kernel is run in three arms, selected by the skip condition: decay_all (skip = false) reproduces the P2 forgetting curve; selective (skip = i % 2 == 0) protects even synapses and decays odd ones; protect_all (skip = true) writes nothing and serves as a null control. We report the result across three independent nightly calibrations. (1) Selective retention works and is reproducible: neuron 0, the same cell under the same rule, falls to silence when unprotected (let-go edge k = 8, 8, 7) yet never drops below about 4.3 spikes when protected — all three calibrations. (2) The protect_all control is flat at every k, every neuron, every day (global minimum 4.0 spikes), proving that running the rule changes nothing on its own; only its weight writes do. (3) Direct on-chip weight readout is exact on every day (60/50/40/30/20 read back unchanged), validating the measuring instrument before the comparative claim. (4) The protection mask maps one-to-one onto the neurons — every even neuron held, every odd neuron released, three calibrations running. (5) Two neurons (2 and 4) are always-on across seven consecutive runs and never let go under any arm. The underlying mechanism is known and intended: conditional per-synapse updates are exactly what a programmable plasticity processor is for; no mechanism-level novelty is claimed. The contribution is a clean, three-calibration demonstration that on-chip retention is selective and reproducible, reported with its confound stated plainly: only neuron 0 is a clean protection demonstration — the selective arm also “holds” the always-on neurons 2 and 4, whose protection cannot be distinguished from their baseline inertia, and a Day-1 impression that odd neurons release earlier under protection did not replicate and was withdrawn. The mid-decay weight was not read back; retention is evidenced by the pops contrast, the exact static readout, and the null control. Scope-lock per Maya-Meta P2: reproducible signatures within THIS architecture under THIS protocol — Property, not Law; one chip, one mask, one stimulus; a characterization of selective on-chip retention, not new physics. Series: Part of the Maya-Sutra Series — Nexus Learning Labs’ hardware-native track, characterizing neuromorphic substrates directly (one substrate, one honest characterization at a time). The arc: let go (P1) → forget (P2) → remember (P3). Research characterization only. Links: GitHub Repository (private — to request access: email research@nexuslearninglabs.in with subject "Code Access Request — Maya-Sutra-P3" and your research context) | Interactive Dashboard | FAQ | Full Series Index — nexuslearninglabs.in Nexus Learning Labs, Bengaluru · UDYAM-KR-02-0122422 · BHASKAR IN-0526-9452JS · ORCID: 0000-0002-3315-7907 · VAIRAGYA_DECAY_RATE = 0.002315 — an ORCID-derived provenance mark, not an experimental parameter. Each paper's disclosure block states whether it reached a result in that paper. · Canary: MayaNexusVS2026NLL_Bengaluru

Publication details

Journal / source
Zenodo (CERN European Organization for Nuclear Research)
Publication date
1 September 2026