Characterization of Vertical AZO/p-GaN/n-GaN Heterojunction Bipolar Transistor

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Authors: Jaehee Cho, Jongseob Kim, Dong Yeong Kim, Kyoung-Kook Kim, Goeun Bang, Taenam Kwon, Sooyoung Kim, Changyong Kim
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Abstract

Vertical device architectures are attracting attention for power electronics applications owing to their high current capabilities and space-efficient layouts. In this study, we demonstrate a GaN-based vertical heterojunction bipolar transistor employing aluminum-doped zinc oxide (AZO) as the collector layer, deposited by radio frequency sputtering at a low temperature. This low-temperature process avoids thermal damage to the underlying p-GaN base layer and provides a fabrication-compatible route for device integration. Numerical simulations indicated that the AZO/p-GaN/n-GaN stack formed suitable band alignments to support the transistor operation. The fabricated device showed current switching and amplification in the common-base configuration, while the common-emitter mode exhibited abnormal behavior caused by reverse leakage at the base-collector junction. These results confirm the viability of the low-temperature AZO-based collector approach and indicate its potential for integration into high-performance vertical high-power transistors.

Fields of Study & Subjects

GaN-based semiconductor devices and materials Silicon Carbide Semiconductor Technologies Ga2O3 and related materials

Publication details

Journal / source
AIP Publishing
Publication date
1 January 2026