Comparative Analysis of Pulse Width Modulation Methods for Circulating Current Reduction in Parallel NPC Inverters

As power demand in industrial applications increases, parallel-connected Neutral Point Clamped inverter structures have emerged as key technologies across various fields. While parallel NPC inverter systems offer high power density and enhanced system reliability, circulating currents generated by intermodule closed loops present significant challenges. These circulating current increase the stress on power devices cause output current distortion, and degrade system efficiency. Previous studies have focused primarily on reducing the circulating current and improving the output current THD via different pulse width modulation (PWM) methods. However, comprehensive analysis of their impact on power devices and DC-link capacitor reliability has been insufficient. The research presents a comparative analysis of three PWM methods: PD-based SVPWM, PD-based IIDPWM, and APOD-based DRPWM. The analysis incorporates circulating current reduction effects and a comprehensive reliability evaluation through power loss and thermal stress analysis. The simulation and experimental results demonstrate that each modulation method exhibits distinct characteristics in terms of circulating current reduction and system reliability, confirming the need for optimal selection on the basis of specific application requirements.