Modeling, Analysis of Twin Lane Architecture in FADEC of Developmental Aero Engine

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Authors: Vivekanand Sanjawadmath, MN. Suma, R. Suresh
Cited by: 0
References: 4

Abstract

This paper presents a comprehensive real-time modeling and analysis framework for twin lane architecture for Full Authority Digital Engine Control (FADEC) system of a developmental aero gas turbine engine focusing on fault handling, lane redundancy management and lane switching logics. Each lane is modeled as a fully capable engine controller, operating in active-hot standby configuration, with a real time fault handling and lane switching over mechanism in case of controlling lane failure. In safety-critical aero engine applications, reliable fault handling and lane switching over are essential to maintain continuous engine operation. Detailed simulations are carried out to evaluate the system’s response under various fault scenarios including sensor faults, actuator faults, software watchdog time out or Forced Lane Change (FLC). The impact of lane switching over and recovery time on overall system is tested in Advanced Software-In-Loop Simulation (A-SILS). Further the proposed lane management logics incorporate both software and hardware level implementation to meet stringent real time and safety requirements in FADEC unit. Due to high risks associated with injecting real-time faults into sensors or actuators, experimental validation on developmental aero engine equipped with FADEC unit was carried out using FLC condition. The results showed the robustness and effectiveness of the Lane management logics meeting the design and safety requirements

Fields of Study & Subjects

Aerospace Engineering and Applications Fault Detection and Control Systems Distributed systems and fault tolerance

Publication details

Journal / source
Journal of Aerospace Sciences and Technologies
Pages
17–27
Publication date
23 February 2026
Language
EN