Module Design of S-curve Acceleration and Deceleration Control Based on FPGA for Numerical-control Systems

A high-frequency sampling S-curve acceleration and deceleration control algorithm utilizing a field-programmable gate array (FPGA) have been implemented to address the challenges associated with the complex S-curve acceleration and deceleration control algorithm in numerical control systems. It also includes the issues existing in hardware implementation and the discontinuity of transition points in the detection results. A discrete sampling iteration formula for the 7-segment S-curve acceleration and deceleration has been derived. Furthermore, an S-curve acceleration and deceleration control module, encompassing system clock processing, speed frequency calculation, transition point determination, and drive pulse generation, has been developed using hardware description language (HDL). The criteria for determining each transition point during the motion of both 7-segment and complete S-curves have been thoroughly analyzed. A simplified CNC system hardware platform based on a motion controller was constructed. Through extensive analysis of the frequency and position curves derived from motor encoder feedback pulses, it was observed that the motor’s acceleration and speed transitions are smooth, devoid of any abrupt steps or discontinuities. The acceleration and deceleration periods are brief, with no instances of step loss, thereby enhancing motor operational efficiency and system reliability. Additionally, the S-curve acceleration and deceleration control module is characterized by its straightforward design, high sampling frequency, rapid computation speed, and the capability for reconfiguration and reuse.