Sub-Threshold VLSI Circuits for Energy-Efficient Embedded Systems
Abstract
The increasing use of battery-powered and energy-constrained embedded computing systems in deployment in applications like the Internet of Things, wearable electronics, and biomedical devices has provided an urgent and imperative demand to ultra-low-power VLSI circuit design methodologies. Most of the strategies that can be implemented, including sub-threshold operation, in which MOS transistors are operated in the weak field below the threshold voltage, have proved to be very effective in reducing energy consumption by taking advantage of the exponential currentvoltage properties of CMOS devices. In this paper, a systematic exploration of sub-threshold scheme of VLSI circuit design in the quest to attain energy-efficient embedded systems with prolonged life time is presented. The basic details of sub-threshold device modelling, the current conduction physics, and leakage characteristics are studied in order to have a firm theoretical background. The paper also analyses the main issues of design involved in sub-threshold operation such as a high sensitivity to variations in process, voltage, and temperature, reduced noise margins, and performance limits. In order to meet these needs, a number of circuit-level and systems level optimization solutions have been considered, which includes robust logic design, variability based sizing related measures, adaptive biasing and reduction of memory architecture with direct involvement towards ultra-low-voltage work. Specifically, performance and stability levels of the sub-threshold logic styles and the adapted SRAM cells are analysed so that they can be confident of being able to function reliably in the face of extreme voltage scaling. Evaluations of a representative CMOS technology node based on simulations show that power consumption and energy per operation reduction when compared to designs based on traditional super-threshold designs is large, and at lower throughput, performance with embedded workloads remains acceptable. The findings verify that well-selected sub-threshold VLSI circuits could provide substantial improvements in energy efficiency, and they can be used as a promising and scalable solution to next-generation ultra-low-power embedded systems with long battery life and energy independence.
Fields of Study & Subjects
Low-power high-performance VLSI design
Advancements in Semiconductor Devices and Circuit Design
Analog and Mixed-Signal Circuit Design
Publication details
- Volume
- 01
- Issue
- 01
- Pages
- 07–12
- Publication date
- 1 January 2026
- Language
- EN