Methodology for verification of libraries of standard VLSI elements based on a specialized test structure
Abstract
The article presents a methodology for verifying libraries of standard digital elements based on a specialized test structure. The main property of the developed methodology is technological independence, which ensures the wide application of the methodology for verifying libraries of standard digital elements supported and under development for semiconductor technologies of «MERI», SC.
Fields of Study & Subjects
VLSI and Analog Circuit Testing
Integrated Circuits and Semiconductor Failure Analysis
VLSI and FPGA Design Techniques
Publication details
- Journal / source
- Электронная техника Серия 3 Микроэлектроника
- Issue
- 4
- Pages
- 52–52
- Publication date
- 1 January 2026
- Language
- EN