Thin-Film Transistors and Circuits from Solution Processing and ALD and Their Integration into Sensor Devices

This doctoral thesis belongs to the field of electrical engineering, materials science and nanotechnology, with a focus on thin-film deposition and semiconductor device fabrication. The work centers on the development, optimization, and application of atomic layer deposition (ALD) processes for hafnium dioxide (HfO 2 ) as a high-k gate dielectric in indium oxide (In 2 O 3 )-based thin-film transistors (TFTs). HfO 2 was selected for its high permittivity, thermal stability, and compatibility with low-temperature processing, making it well-suited for emerging applications in flexible and transparent electronics. The research includes three main components: (i) precursor selection and ALD recipe development for HfO 2 deposition, (ii) integration of the optimized dielectric into In 2 O 3 TFTs fabricated on both rigid and flexible substrates, and (iii) demonstration of area-selective ALD (ASALD) using Kapton tape masking to enable additive patterning without conventional lithography. Extensive material characterization was performed using spectroscopic ellipsometry, X-ray photoelectron spectroscopy (XPS), and scanning electron microscopy (SEM) to evaluate film thickness, composition, and surface morphology. Electrical characterization of the TFTs included transfer and output measurements, revealing consistent device performance with subthreshold swings as low as ~140 mV/dec and on/off ratios exceeding 105, performance metrics that approach the upper range reported for solution-processed In 2 O 3 devices using comparable fabrication approaches. A hybrid ALD process was systematically developed to improve HfO 2 film quality at substrate temperatures below 150 °C, addressing key challenges in process conformality and interface quality. The incorporation of these optimized dielectrics into In 2 O 3 TFTs resulted in enhanced switching behavior and reduced hysteresis, particularly on flexible polyimide substrates. Furthermore, the ASALD technique was employed to fabricate patterned dielectric with micrometer-scale resolution. As a functional demonstration of the developed materials and processes, a novel inverter circuit was designed by integrating an ALD-based In 2 O 3 TFT with a temperature-sensitive resistor. This circuit was combined with a printed energy storage module and an irreversible optical indicator to create a fully thin-film, CMOS-chip-free temperature sensor. The device provides a permanent visual output upon crossing a critical thermal threshold, highlighting a rare example of a monolithically integrated, self-powered, disposable electronic label. The findings demonstrate the viability of thermal ALD for high-performance oxide TFTs and the potential of ASALD as a lithography-free patterning technique for large-area, flexible electronics. This work contributes to the advancement of sustainable and scalable fabrication methods for next-generation electronic systems.