A Bayesian System with Neuron Clocks for Biosignal Classification
Abstract
A compact Bayesian system for end-to-end inference that uses time-encoded probabilistic computing is presented. The architecture integrates (1) a neuron clocking scheme for timing sequential phases of the system, (2) a feature-extraction module based on rate-coding information with neuron circuits, (3) a circuit able to extract likelihoods from a probability distribution and then calculate Bayes' rule and (4) a race-to-threshold winner-take-all circuit that can drive downstream actuation circuits. All circuits were implemented and simulated at the transistor level in TSMC 130 nm CMOS using a 1.0 V supply. The system was benchmarked using a two-category sleep-stage classification task, and achieved an accuracy of 80.8%, which closely matches the 81.5% result of an equivalent inference in software. The complete architecture uses less than 150 transistors, making it suitable for ultra-lowpower edge biosignal processing.
Fields of Study & Subjects
Analog and Mixed-Signal Circuit Design
Advanced Memory and Neural Computing
Low-power high-performance VLSI design
Publication details
- Journal / source
- HAL
- Publication date
- 11 January 2026
- Language
- EN
- Document type
- Preprint